“State-of-the-Art Automotive Radar System Architectures and What Else We Can Do with Them” webinar by Prof. Gardill

Automotive Radar operating in the 77 GHz and 79 GHz bands is the largest market for mmWave systems. Consequently, a de-facto standard system architecture has evolved which is used by most devices on the market and under current development. Modern automotive radars are to a large extent software defined and enable adaptive selection of waveform parameters as well as dynamic utilization of RF subsystems such as transmit and receive channels. This flexibility is the key-enabler for implementing multi-purpose radar sensors, which can realize functions from adaptive cruise control down to automated parking all in one device. Together with the high-volume of automotive radars also comes a rapid cost-reduction. Consequently, they become more and more attractive for solving various other sensing challenges: something else they have originally been designed for.

After reviewing the state-of-the art system architecture of automotive radar sensors, this presentation will introduce some novel ideas and applications how performance of that automotive “mass-product” can be further improved and how their flexibility allows for a widespread use, far beyond the traditional adaptive cruise control.

Markus Gardill is professor for Satellite Communication Systems at the chair of computer science VII – robotics and telematics at the university of Würzburg.
He received the Dipl.-Ing. and Dr.-Ing. degree in systems of information and multimedia technology/electrical engineering from the Friedrich-Alexander-University Erlangen-Nürnberg, Germany, in 2010 and 2015, respectively, where he was a research assistant, teaching fellow, and later head of the team for radio communication technology.
Between 2015 and 2020 he was R&D engineer and research cluster owner for optical and imaging metrology systems at Robert Bosch GmbH. Later he joined InnoSenT GmbH as head of the group radar signal processing & tracking, developing together with his team new generations of automotive radar sensors for advanced driver assistance systems and autonomous driving.
His main research interest include radar and communication systems, antenna (array) design, and signal processing algorithms.
His particular interest is space-time processing such as e.g. beamforming and direction-of-arrival estimation, together with cognitive and adaptive systems. He has a special focus on combining the domains of signal processing and microwave/electromagnetics to develop new approaches on antenna array implementation and array signal processing. His further research activities include distributed coherent/non-coherent networks for advanced detection and perception, machine-learning techniques for spatial signal processing, highly-flexible software defined radio/radar systems, and communication systems for NewSpace.
Markus Gardill is member of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S).
He served as co-chair of the IEEE MTT-S Technical Committee Digital Signal Processing (MTT-9), regularly acts as reviewer and TPRC member for several journals and conferences, and currently serves as associate editor of the Transactions on Microwave Theory and Techniques. He is a Distinguished Microwave Lecturer (DML) for the DML term 2018-2020 with a presentation on signal processing and system aspects of automotive radar systems.

Please sign up and join us on Monday, October 19, 2020 at 11:00 (Israel Daylight Time).

A link to the Zoom session will be provided after registration.

Important: The participation is free of charge, but registration is required /registration-markus-gardill/

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“Active Electronic Transceivers for THz Communication Systems” webinar by Prof. Ingmar Kallfass

The presentation focuses on the design of analog transmit and receive frontends for THz wireless communication systems. The high performance mm-Wave monolithic integrated circuits, implemented in GaAs metamorphic high electron mobility transistor technologies with cutoff frequencies beyond 1 THz, integrate quadrature up- and down conversion channels for either direct/zero-IF or heterodyne architectures, LO frequency generation stages along with power amplifiers and low-noise amplifiers operating at 240 and 300 GHz RF frequencies. On the system level, these transceiver components have enabled data transmission experiments with 64 Gbit/s bit rates over 850 m link distance and up to 100 Gbit/s over 15 m indoor distances, both, as pure electronic transmit and receive frontends, and in the prospective combination of photonic transmitters with electronic receivers.

Ingmar Kallfass received the Dipl.-Ing. degree in Electrical Engineering from University of Stuttgart in 2000, and the Dr.-Ing. degree from University of Ulm in 2005. In 2001, he worked as a visiting researcher at the National University of Ireland, Dublin. In 2002, he joined the department of Electron Devices and Circuits of University of Ulm as a teaching and research assistant. In 2005, he joined the Fraunhofer Institute for Applied Solid-State Physics. From 2009 to 2012, he was a professor at the Karlsruhe Institute of Technology. Since 2013, he holds the chair for Robust Power Semiconductor Systems at the University of Stuttgart, where his major fields of research are compound semiconductor based circuits and systems for power and microwave electronics.

Please sign up and join us on Wednesday, September 23, 2020 at 16:00 (Israel Day Time). A link to the Zoom session will be provided after registration.
Important: The participation is free of charge, but registration is required /registration-ingmar-kallfass/
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“Evolution of cellular RFICs (2G to 5G)” webinar by Dr. Venumadhav (Venu) Bhagavatula

Cellular technology has witnessed five generations of evolution – the mobile UE-era ushered in by 2G (GSM/EDGE), to the future smart-phones that will powered by the enhanced spectral efficiency of 5G. Each ‘G’ improved the user experience while introducing new hardware design challenges. I compare 2/3/4/5G system requirements, derive key TX/RX/LO circuit specifications, and highlight the differences in circuit topologies suited for these contrasting specifications. Using this framework, circuit techniques to handle a diverse range of problems such as low phase-noise oscillators, improved blocker tolerance, single-RB linearity will be introduced.

Venumadhav (Venu) Bhagavatula received the B.E. degree in electronics and communication from the University of Delhi, New Delhi, India, the M.Tech. degree in electronic design technology from the Indian Institute of Science, Bangalore, India, and the Ph.D. degree in electrical engineering from the University of Washington, Seattle, WA, USA, in 2005, 2007, and 2013. Since 2014 he has been with the Advanced Circuit Design group at Samsung Semiconductors Inc., San Jose, CA, USA. His research interests include RF/mm-wave and low-power mixed signal circuits. He currently serves as a technical program committee member for the ISSCC.

Please sign up and join us on Wednesday, September 9, 2020 at 16:00 (Israel Day Time). A link to the Zoom session will be provided after registration.

Important: The participation is free of charge, but registration is required /registration-venu-bhagavatula/

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“Mixed-Signal Computing for Deep Neural Network Inference” – webinar by Prof. Boris Murmann from Stanford University, USA

Modern deep neural networks (DNNs) require billions of multiply-accumulate operations per inference. Given that these computations require relatively low precision, it is feasible to consider analog arithmetic, which can be more efficient than digital in the low-SNR regime. However, the scale of DNNs favors circuits that leverage dense digital memory, leading to mixed-signal processing schemes for scalable solutions. This presentation will investigate the potential of mixed-signal approaches in the context of modern DNN processor architectures, which are typically limited by data movement and memory access. We will show that dense mixed-signal fabrics offer new degrees of freedom that can help alleviate these bottlenecks. In addition, we will derive asymptotic efficiency limits and highlight the challenges associated with data conversion interfaces (D/A and A/D) as well as programmability. Finally, these findings are extended to in-memory computing approaches (SRAM and RRAM-based) that are bound by similar constraints.

Boris Murmann is a Professor of Electrical Engineering at Stanford University. He joined Stanford in 2004 after completing his Ph.D. degree in electrical engineering at the University of California, Berkeley in 2003. From 1994 to 1997, he was with Neutron Microelectronics, Germany, where he developed low-power and smart-power ASICs in automotive CMOS technology. Since 2004, he has worked as a consultant with numerous Silicon Valley companies. Dr. Murmann’s research interests are in mixed-signal integrated circuit design, with special emphasis on sensor interfaces, data converters and custom circuits for embedded machine learning. In 2008, he was a co-recipient of the Best Student Paper Award at the VLSI Circuits Symposium and a recipient of the Best Invited Paper Award at the IEEE Custom Integrated Circuits Conference (CICC). He received the Agilent Early Career Professor Award in 2009 and the Friedrich Wilhelm Bessel Research Award in 2012. He has served as an Associate Editor of the IEEE Journal of Solid-State Circuits, an AdCom member and Distinguished Lecturer of the IEEE Solid-State Circuits Society, as well as the Data Converter Subcommittee Chair and the Technical Program Chair of the IEEE International Solid-State Circuits Conference (ISSCC). He is the founding faculty co-director of the Stanford SystemX Alliance and the faculty director of Stanford’s System Prototyping Facility (SPF). He is a Fellow of the IEEE.

Please sign up and join us on Monday, August 17, 2020 at 17:00 (Israel Day Time). A link to the Zoom session will be provided after registration.

Important: The participation is free of charge, but registration is required /registration-boris-murmann/

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“Integrated Transformers: from Principles to Applications” – webinar by Prof. Andrea Bevilacqua, University of Padova, Italy

Integrated magnetic transformers are becoming ubiquitous in mm-wave and RF systems, while also finding application in fully-integrated dcdc converters. This talk will cover the fundamentals of the transformer operation spanning from the underlying physical principles, and the link between the magnetic parameters (inductances and magnetic coupling) and the geometry of the device, to its use in the design of building blocks like LNA’s, PA’s, VCO’s, etc. The advantages and possibilities of using a transformer for the implementation of baluns, impedance transformation networks, higher-order resonant networks, feedback circuits, etc., will be highlighted.

Andrea Bevilacqua received the Laurea and Ph.D. degrees in electronics engineering from the University of Padova, Padova, Italy, in 2000, and 2004, respectively. From 2005 to 2015, he was an Assistant Professor with the Department of Information Engineering, University of Padova, where he is now an Associate Professor. His current research interests include the design of analog and RF/microwave integrated circuits and the analysis of wireless communication systems, radars, and dcdc converters. He is author or coauthor of more than 100 technical papers, and he holds 6 patents.

Prof. Bevilacqua is a member of the ITPC of IEEE ISSCC. He served in the TPC of IEEE ESSCIRC from 2007 to 2019, and was TPC Co-Chair of IEEE ESSCIRC 2014. He was a member of the TPC of IEEE ICUWB from 2008 to 2010. He was an Associate Editor of the IEEE Transactions of Circuits and Systems II from 2011 to 2013 and was nominated Best Associate Editor for the IEEE Transactions of Circuits and Systems II for 2012 to 2013. He served as a Guest Editor for the special issue of the IEEE Journal of Solid-State Circuits dedicated to ESSCIRC 2017. He currently serves in the Distinguished Lecturer program of the IEEE Solid-State Circuits Society.

Please sign up and join us on Wednesday, August 5 at 11:00 IDT.

Link to the Zoom session will be provided after the registration.

Important: The participation is free of charge, but registration is required /registration-andrea-bevilacqua/

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“Millimeter-Wave Transceivers for High Volume Applications” – webinar by Prof. Thomas Zwick, Karlsruhe Institute of Technology (KIT), Germany

The enormous technological progress accomplished over the last decades facilitates the utilization of millimeter-wave (mm-Wave) frequencies for mass products like automotive radars, industrial sensors, high-speed data communication links or medical applications. The main enablers are the semiconductor technologies with constantly improving cut-off frequencies reaching several hundred GHz. The dominant limiting factor though for the mass production of low-cost mm-Wave systems above 100 GHz is that, suitable packaging technologies are not yet finally available. The major issue for the packaging is to find a proper way to get all signals in and out of the package, since at mm-Wave frequencies interconnects are very difficult to realize and very lossy. One way out of the dilemma is to integrate the complete transceiver together with the antenna into one single package. Compactness is the key to low losses in mm-Wave interconnects. This also means that the antenna must be integrated into the package.
In this talk, a short overview on the packaging and antenna integration concepts for mm-Wave transceivers is provided together with several particular approaches.

Thomas Zwick (S’95–M’00–SM’06–F’18) received the Dipl.-Ing. (M.S.E.E.) and the Dr.-Ing. (Ph.D.E.E.) degrees from the Universität Karlsruhe (TH), Germany, in 1994 and 1999, respectively. From 1994 to 2001 he was a research assistant at the Institut für Höchstfrequenztechnik und Elektronik (IHE) at the Universität Karlsruhe (TH), Germany. In February 2001, he joined IBM as research staff member at the IBM T. J. Watson Research Center, Yorktown Heights, NY, USA.
From October 2004 to September 2007, Thomas Zwick was with Siemens AG, Lindau, Germany. During this period, he managed the RF development team for automotive radars. In October 2007, he became a full professor at the Karlsruhe Institute of Technology (KIT), Germany. He is the director of the Institute of Radio Frequency Engineering and Electronics (IHE) at the KIT. He co-editor of 3 books, author or co-author of 120 journal papers, over 400 contributions at international conferences and 15 granted patents. His research topics include wave propagation, stochastic channel modeling, channel measurement techniques, material measurements, microwave techniques, millimeter wave antenna design, wireless communication and radar system design.
Thomas Zwick’s research team received over 10 best paper awards on international conferences. He served on the technical program committees (TPC) of several scientific conferences. In 2013 Dr. Zwick was general chair of the international Workshop on Antenna Technology (iWAT 2013) in Karlsruhe and in 2015 of the IEEE MTT-S International Conference on Microwaves for Intelligent Mobility (ICMIM) in Heidelberg. He also was TPC chair of the European Microwave Conference (EuMC) 2013 and General TPC Chair of the European Microwave Week (EuMW) 2017. From 2008 until 2015 he has been president of the Institute for Microwaves and Antennas (IMA). T. Zwick became selected as a distinguished IEEE microwave lecturer for the 2013 to 2015 period with his lecture on “QFN Based Packaging Concepts for Millimeter-Wave Transceivers”. Since 2017 he is member of the Heidelberg Academy of Sciences and Humanities. In 2018 Thomas Zwick became appointed IEEE Fellow. In 2019 he became the Editor in Chief of the IEEE Microwave and Wireless Components Letters. Since 2019 he is a member of acatech (German National Academy of Science and Engineering).

Please sign up and join us on Tuesday , July 21 at 11:00 IDT.

Link to the Zoom session will be provided after the registration.

Important: The participation is free of charge, but registration is required  /registration-thomas-zwick/

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“Energy-Efficient Communication Technologies for Emerging Internet-of Things Applications”

Webinar

The ACRC (Advanced Circuit Research Center) in cooperation with the IEEE Solid State Circuits Society continues the series of “ACRC Semiconductor Webinars”  – insightful and enriching workshops held by international leaders and professionals of the semiconductors sector.

This time we are inviting you to a free online seminar on “Energy-Efficient Communication Technologies for Emerging Internet-of Things Applications” given by Prof. Patrick Mercier from University of California, San Diego.

Emerging Internet-of-Things (IoT) devices all require robust yet low-power wireless communications. Unfortunately, most current wireless standards do not intrinsically support low-power operation due to strict requirements on modulation formats, data rates, linearity, packet overheads, and so on. These restrictions impose minimum power consumption requirements for cellular standards (e.g., GSM, LTE, and 5G) and WiFi, but also surprisingly limit the ability of supposedly low-power standards (e.g., Bluetooth Low Energy and Narrowband-IoT) from reaching new application-enabling power levels. This presentation will outline the major challenges facing power reduction in modern wireless systems, and will describe several possible solutions to these challenges. Specifically, we will explore the use of wake-up receivers as a means to reduce the power overhead of between-node synchronization, including a look at a recent design operating at 9GHz. Then, we will discuss a variety of alternative communication schemes that can help to reduce the power of communication in WiFi and body-area-network systems by >1,000x through use of WiFi-compliant backscatter communication and magnetic human body communication systems, respectively. We will then introduce new circuit design techniques based on a topologically-derived “digitally-replaced analog” paradigm towards the implementation of efficient Li-ion-battery-connected RF power amplifiers for high-performance wireless systems.

Patrick Mercier is an Associate Professor of Electrical and Computer Engineering and co-founder/co-director of the Center for Wearable Sensors at UC San Diego. He received his B.Sc. degree from the University of Alberta, Canada, in 2006, and the S.M. and Ph.D. degrees from MIT in 2008 and 2012, respectively. Prof. Mercier has received numerous awards, including the San Diego Engineering Council Outstanding Engineer Award in 2020, a National Academy of Engineering Frontiers of Engineering Speaker in 2019, the NSF CAREER Award in 2018, the Biocom Catalyst Award in 2017, the UCSD Academic Senate Distinguished Teaching Award in 2016, the DARPA Young Faculty Award in 2015, the Beckman Young Investigator Award in 2015, The Hellman Fellowship Award in 2014, the International Solid-State Circuits Conference (ISSCC) Jack Kilby Award in 2010, amongst others. He has published over 130 peer-reviewed papers in venues such as Nature Biotechnology, Nature Communications, ISSCC (17 papers), Advanced Science, and others. He is an Associate Editor of the IEEE Transactions on Biomedical Circuits and Systems and the IEEE Solid-State Circuits Letters, is a member of the ISSCC, CICC, and VLSI Technical Program Committees, and has co-edited three books: High-Density Integrated Electrocortical Neural Interfaces (Elsevier Academic Press, 2019), Power Management Integrated Circuits (CRC Press, 2016), and Ultra-Low-Power Short-Range Radios (Springer, 2015). His research interests include the design of energy-efficient mixed-signal systems, RF circuits, power converters, and sensor interfaces for wearable, medical, and mobile applications

Please sign up and join us on Tuesday, July 7 at 20:00 (Israel Day Time).

A link to the Zoom session will be provided after registration.

Important: The participation is free of charge, but registration is required /registration-patrick-mercier/

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“Analog Building Blocks of DC-DC Converters”

Webinar

The ACRC (Advanced Circuit Research Center) in cooperation with the IEEE Solid State Circuits Society continues the series of “ACRC Semiconductor Webinars”  – insightful and enriching workshops held by international leaders and professionals of the semiconductors sector.

This time we are inviting you to a free online seminar on “Analog Building Blocks of DC-DC Converters” given by Prof. Bernhard Wicht from Leibniz University Hannover.

System behavior and performance of power management strongly depend on the implementation on circuit level. This tutorial covers the design of DCDC converter building blocks like power switches, gate drivers and their supply, level shifters, error amplifier as well as control loop and current sensing techniques. Circuits for diagnostics and protection will also be addressed. Increasing switching frequency scales down passive components, but poses a challenge for the design of timing critical circuits. The lecture will highlight trade-offs between speed, efficiency, complexity, voltage and current capabilities.

Prof. Bernhard Wicht has 20+ years of experience in analog and power management IC design. He received the Dipl.‑Ing. degree in electrical engineering from University of Technology Dresden, Germany, in 1996 and the Ph.D. degree (Summa Cum Laude) from University of Technology Munich, Germany, in 2002. Between 2003 and 2010, he was with Texas Instruments, Freising, responsible for the design of automotive power management ICs. In 2010, he became a full professor for integrated circuit design and a member of the Robert Bosch Center for Power Electronics at Reutlingen University, Germany. Since 2017, he has been heading the Chair for Mixed-Signal IC Design at Leibniz University Hannover, Germany. His research interest includes IC design with focus on power management, gate drivers and high-voltage ICs. Dr. Wicht was co-recipient of the 2015 ESSCIRC Best Paper Award and of the 2019 First Prize Paper Award of the IEEE Journal of Emerging and Selected Topics in Power Electronics. In 2018, he received the faculty award for excellent teaching at his university. He invented seventeen patents with several more pending. He currently serves as a member of the Technical Program Committees of ESSCIRC and ISSCC.

Please sign up and join us on Tuesday, June 16 at 16:00 (Israel Day Time).

Link to the Zoom session will be provided after registration.

Important: The participation is free of charge, but registration is required /registration-bernhard-wicht/

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“Agile Hardware Design with a Generator-Based Methodology”

Webinar

The Advanced Circuit Research Center (ACRC) is inviting you to a free online seminar  “Agile Hardware Design with a Generator-Based Methodology” given by Prof. Elad Alon, University of California, Berkeley.

Despite the many applications that could substantially benefit from the energy-performance achievable with an SoC implemented in an advanced process technology, the high costs of designing and verifying such an SoC using current methodologies limits their adoption to end markets greater than ~$1B in size. Not only has this prevented substantial hardware innovation in emerging markets, but even in markets large enough to bear the high initial design cost, designers are being put under constant pressure to improve their productivity given increasingly tight time-to-market constraints and product cycles. In this talk Prof. Alon will describe a collaborative effort to develop an “agile” approach that aims to substantially reduce the design and verification costs of such advanced SoCs as well as their constituent sub-components. Building on principles originally developed for agile software design, the key missing piece for hardware is that rather than focusing on developing instances, designers should focus on developing generators that facilitate re-use and enable agile validation as well as verification. As he will describe in this talk, to support this shift in approach, a number of new technologies have been and continue to be developed in order to enable generation of digital and analog hardware as well as the means to verify the hardware that is produced. After briefly describing a subset of these technologies and highlighting some of their key features, he will then briefly describe various SoC generators and associated results from multiple SoC demonstrators taped-out and validated in a modern FinFET process technology.

Elad Alon is a Professor of Electrical Engineering and Computer Sciences at the University of California at Berkeley, a co-director of the Berkeley Wireless Research Center (BWRC), and an IEEE Fellow. He is also a Co-Founder and Chief Scientist at Blue Cheetah Analog Design, which is commercializing generator technologies to enable analog/mixed-signal solutions at lower barrier to entry.  He has held advisory, consulting, or visiting positions at a number of leading semiconductor companies, and along with his colleagues and students, been recognized with a number of awards at conference such as ISSCC, VLSI, and CICC.

Please sign up and join us on Tuesday , June 2 at 18:00 IDT.

Link to the Zoom session will be provided after the registration.

Important: The participation is free of charge, but registration is required  /webinar-alon-reg/

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