Supervisor: Professor Yusuf Leblebici
Place: Auditorium Floor 10, Electrical Engineering Building, Technion
Date: 12-14 October 2009
Abstract:
Seminar “Low Power CMOS Circuit Design”
12-14 October 2009
Professor Yusuf Leblebici
Yusuf Leblebici received the B.S. and M.S. degrees in electrical engineering from Istanbul Technical University in 1984 and 1986, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign (UIUC) in 1990.
Between 1991 and 2001, he worked as a faculty member at UIUC, at Istanbul Technical University, and at Worcester Polytechnic Institute (WPI), where he established and directed the VLSI Design Laboratory, and also served as a project director at the New England Center for Analog and Mixed-Signal IC Design. He also worked as the Microelectronics Program Coordinator at Sabanci University. Since January 2002, he has been a full professor at the Swiss Federal Institute of Technology in Lausanne (EPFL), and director of the Microelectronic Systems Laboratory. His research interests include design of high-speed and low-power CMOS digital and mixed-signal integrated circuits, computer-aided design of VLSI systems, modeling and simulation of nano-electronic circuits, intelligent sensor interfaces, and VLSI reliability analysis. Dr. Leblebici is the coauthor of three textbooks, namely, “CMOS Digital Integrated Circuits: Analysis and Design” (McGraw Hill, 1996, 1999 and 2003), “Hot-Carrier Reliability of MOS VLSI Circuits” (Kluwer Academic, 1993), “CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications” (Springer, 2007) as well as more than 150 scientific articles published in international journals and conferences.
Dr. Leblebici has served on the organizing and technical program committees of the 1995 European Conference on Circuit Theory and Design (ECCTD 1995), the 2004 European Workshop on Microelectronics Education (EWME 2004), and as General Co-Chair of the Joint 2006 European Solid-State Circuits Conference and European Solid-State Device Research Conference (ESSCIRC-ESSDERC 2006). He also served as an Associate Editor of IEEE Transactions on Circuits and Systems II, and as an Associate Editor of IEEE Transactions on VLSI. He received the Young Scientist Award of the Turkish Scientific and Technological Research Councils in 1995, and the Joseph Samuel Satin Distinguished Fellow Award of the Worcester Polytechnic Institute in 1999.
Syllabus
Low Power CMOS Circuit Design
- Introduction to low power CMOS circuit design
2. Dynamic (switching) and leakage power consumption
3. Influence of technology scaling and nanometer CMOS
4. Minimizing energy consumption under performance constraints
5. Dynamic voltage-frequency scaling (DVFS) techniques
6. Physics and modeling of subthreshold operation in MOSFETs
7. CMOS logic operating in subthreshold regime
8. Benefits and limitations of subthreshold operation in view
of increased leakage in nanometer CMOS technologies
9. Current mode operation for low power
10. Subthreshold source-coupled logic (STSCL) circuits
11. Complex logic gates using STSCL style
12. Two-phase pipelining to improve activity rate
13. Source-follower buffer drivers for large fanout
14. Design automation for standard-cell based STSCL design
15. Cell library creation, placement & routing techniques
Agenda
Monday 12.10.09
13:00 – 13:30 Registration
13:30 – 15:30 Lecture
15:30 – 15:45 Coffee Break
15:45 – 18:00 lecture
Tuesday 13.10.09
08:30 – 09:00 Coffee
09:00 – 10:30 Lecture
10:30 – 10:45 Coffee Break
10:45 – 13:00 Lecture
13:00 – 14:00 Lunch Break
14:00 – 15:30 Lecture
15:30 – 15:45 Coffee Break
15:45 – 17:00 lecture
Wednesday, 14.10.09
08:30 – 09:00 Coffee
09:00 – 10:30 Lecture
10:30 – 10:45 Coffee Break
10:45 – 13:00 Lecture
13:00 – 14:00 Lunch Break
14:00 – 15:30 Lecture
15:30 – 15:45 Coffee Break
15:45 – 17:00 lecture