IC chips are key enablers to a smartly networked society and need to be more compliant to security and safety. For example, semiconductor solutions for autonomous vehicles must meet stringent regulations and requirements. While designers develop circuits and systems to meet the performance and functionality of such products, countermeasures are proactively implemented in silicon to protect against harmful disturbances and even intentional adversarial attacks.
This talk will start with Electromagnetic Compatibility (EMC) techniques applied to IC chips for safety to motivate EMC-aware design, analysis, and implementation. It will discuss IC design challenges to achieve higher levels of hardware security (HWS). Crypto-based secure IC chips are investigated to avoid the risks of side-channel leakages and side-channel attacks, corroborated with silicon demonstrating analog techniques to protect digital functionality. The EMC and HWS disciplines derived from electromagnetic principles are key to establishing IC design principles for security and safety.
Makoto Nagata received the B.S. and M.S. degrees in physics from Gakushuin University, Tokyo, in 1991 and 1993, respectively, and a Ph.D. in electronics engineering from Hiroshima University, Hiroshima, in 2001.. He is currently a professor of the graduate school of science, technology and innovation, Kobe University, Kobe, Japan. He is a senior member of IEICE and IEEE.
His research interests include design techniques targeting high-performance mixed analog, RF and digital VLSI systems with particular emphasis on power/signal/substrate integrity and electromagnetic compatibility, testing and diagnosis, three-dimensional system integration, as well as their applications for hardware security and safety.
Dr. Nagata has been a member of a variety of technical program committees of international conferences. He is chairing the Technology Directions subcommittee for International Solid-State Circuits Conference (2018-present). He is also serving as SSCS AdCom member since 2020. He is currently an associate editor for IEEE Transactions on VLSI Systems (2015-present).
Important: The participation is free of charge, but registration is required
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