Date: 07th April, 2025
Time: 16:00 – 17:30 Israel Time
Language: English
Abstract:
Chiplet-based design is emerging as a key strategy to address the limitations of traditional monolithic semiconductor design, especially as Moore’s Law approaches its physical limits. By partitioning complex systems into smaller, manageable “chiplets,” designers can achieve improved scalability, flexibility, and cost efficiency. Chiplet architecture allows different components of a system-on-chip (SoC) to be developed, manufactured, and integrated separately, facilitating the use of mixed-process technologies, modular upgrades, and faster time-to-market.Despite its potential, chiplet design presents several challenges. This overview explores an overview of chiplet design ranging from die to die interface, interoperability, packaging, cost , design process, signoff check, chiplet builder, thermal performance, repairability and challenges. Hopefully, it will prepare the designer in advance from design planning phase.
Bio:
Ang Boon Chong was born in Penang, Malaysia, in 1978. He received the B.E. degree in microelectronic engineering from the University Putra Malaysia, Malaysia, in 2002, and MBA from Open University Malaysia, Malaysia in 2014. He is currently affiliated with Intel Malaysia, been engaged in a wide variety of advanced nodes and methodology evaluation. He has published over 50 papers, books, white papers as well as delivered invited talks in various workshop and IEEE conferences. He is currently a tech lead within the organization as well as IEEE senior member.
The webinar is free but registration is required. Zoom link will be sent after registration.