Supervisor: Prof. Boris Murmann
Place: Meyer Building, Electrical Engineering Department,Technion
Date: 01.03.2012
Abstract:
Advanced CMOS Analog Integrated Circuit Design Course
March 1-9, 2012
Room 165, Meyer building, Electrical Engineering Dept. Technion
This course provides an introduction to the design of analog integrated circuits in advanced CMOS technologies. The course material combines the analytical treatment and practical design of important circuit blocks with short-channel transistors. Specifically, the student will work toward the design of operational transconductance amplifiers (OTAs) for use in switched-capacitor circuits. Important aspects that will be covered on this route are the gm/ID-based compact modeling in support of systematic design, the treatment of electronic noise, and feedback circuit analysis using the return ratio method.
This course is ideal for students who have already completed the “Linear Electronic Circuits” course at the Technion and wish to deepen their understanding toward advanced design. It will be equally compelling for practitioners in industry who are looking for ways to reposition, further or deepen their careers toward cutting-edge analog IC design.
| Instructor: | Prof. Boris Murmann, Stanford University |
| Prerequisite: | Linear Electronic Circuits http://eecourses.technion.ac.il/044142/ (or equivalent). Knowledge of basic linear system theory, poles and zeros; feedback, basic bipolar and MOS device physics; basic large- and small-signal transistor models. |
| Required Text: | Analysis and Design of Analog Integrated Circuits, 4th Edition, Gray, Hurst, Lewis and Meyer, Wiley, 2001. |
| Lecture: | 28 hours (in English) |
| Workshops: | 10 hours |
| Circuit Simulation:
Admission :
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PSpice
The course is free of charge to ACRC members, Intel, Marvell, Mellanox and Zoran. Non-ACRC members will be charged 2000 Shekels+VAT.
Certificate of accomplishment to be awarded at the completion of the course, passing the final exam and attending all the lectures.
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Course Schedule
| Date | Topic |
| Thu, March 1, 2012 09:00-12:3013:00-15:30 16:00-17:30 workshop |
Lecture Day 1
· Introduction · Review of Square Law MOS Model · Short Channel Effects · Technology Characterization: gm/ID, fT · gm/ID-Based Design |
| Fri, March 2, 2012 09:00-12:00 |
Lecture Day 2
· Miller Approximation · ZVTC Analysis · Electronic Noise |
| Sun, March 4, 2012 09:00-12:3013:00-14:30 15:00-17:00 workshop |
Lecture Day 3
· Review of Common Gate and Common Drain Stages · Differential Pair · Current Mirrors · Process Variations · Mismatch
|
| Mon, March 5, 2012 09:00-12:3013:00-14:30 15:00-17:00 workshop |
Lecture Day 4
· Feedback Circuit Analysis using Return Ratio · Stability of Feedback Circuits · Fully Differential Circuits · Introduction to Switched-Capacitor Circuits · Analysis and Design of Operational Transconductance Amplifiers o Frequency Compensation o Step Response
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| Tue, March 6, 2012 09:00-12:3013:00-15:30 16:00-17:30 workshop |
Lecture Day 5
· Design for low noise · Analysis and Design of Operational Transconductance Amplifiers o OTA Variants o Systematic design · Supply Insensitive Biasing · Bandgap References
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| Fri, March 16, 2012 | Final Exam |
The course is free of charge to EE students (undergraduate and graduate) and has a value of two academic credits
Undergraduate students please register at: http://ug.technion.ac.il/
Graduate students please contact Mrs Keren Seker-Gafni at: kerensg@ee.technion.ac.il
For further information please contact Mrs Suzie Eid: suzie@ef.technion.ac.il
Please note that there are a limited number of places available on this course. Registration does not guarantee you a place in the class.