Design considerations and basic analysis for Inductors and CMOS Radio Frequency Integrated Circuits

Supervisor: Dror Regev

Place: Technion, EE building, Room 1061 (10th floor)

Date: 3.5.11


Design considerations and basic analysis for Inductors and CMOS Radio Frequency Integrated Circuits

Mr. Dror Regev – Terra Freedom Consulting
Dates: May 3,4 2011

Location: Meyer building, Auditorium floor 10

Department of electrical engineering, Technion, Haifa, Israel

This course will start with the design considerations and performance of RFIC inductors and continue with principles, strategies, topologies and challenges in basic CMOS RF circuit design. Simple but powerful analytical tools will be presented to allow designers a better understanding of the challenges and tradeoffs in circuit design preceding CAD circuit simulations. Approaches and tools employed in the seminar may be used as a basis for advanced analysis and design of other RFIC circuits.

Tusday, 3rd of May

08:30-10:00 RFIC Inductors – Inductance basics in Coax, Microstrip and Coupled Micro strips. Layout considerations for Spiral Inductors, Inductor Parasitic, simplified model and Quality factor analysis. Effect of ground and Si substrate on Inductor performance.
10:30-12:00, 13:30-15:00, 15:30-17:00 LNA’s – Common Source Simultaneous Noise and Impedance Matching. Voltage gain analysis of a CS LNA at frequency domain. Electrical stability analysis of a CS LNA and related Impedances. Miller Effect in CS and Cascode transistor introduction. Cascode transistor stability issues. CS IIP3 optimization through gate biasing and the effect of degeneration inductance feedback.

Wednesday, 4th of May

08:30-10:00 Class A PA – maximum linear output power and related optimal load, gain vs. max power out load, device size and operating point considerations, effect of transistor and circuit parasitic, PA stability and stabilization through feedback.
10:30-12:00 Passive Mixer – Modulator in Frequency domain, Time domain analysis, device and operation point optimization, Balanced mixers.
13:30-15:00 Active Mixer – Active design approach and considerations, voltage gain, noise considerations and linearity.
15:30-17:00 VCO-Phase noise and its implications, Oscillator harmonics, Oscillator tanks and oscillation frequency, Tank quality factor and related second order phase noise, Tank design. Methods for injecting energy into the tank, Colpitts Oscillator and it’s phase noise, Colpitts evolution to differential design, VCO Biasing, Large signal analysis, complementary design vs. NMOS design.

Mr. Dror Regev
Short biography

Dror Regev received the BsC degree in electrical engineering from Ben-Gurion University, Israel, in 1987, and the MsC. degree in management from Boston University, in 1994. He is currently teaching CMOS RFIC Circuit Design as an invited lecturer in the Department of Electrical and Computer Engineering, Ben-Gurion University, Israel. From 2006 he teaches RFIC design classes he authored to engineers in the Israeli wireless industry. He is member of IEEE Solid-State Circuits Society.
In 2007, he established an RFIC consulting firm and focused for 3 years on starting up Elipse RFIC Array Devices the first Israeli RFIC design house in Kfar Neter, Israel.
Prior to that, Mr. Regev was with Tower Semiconductors, Israel; Acer Labs, San Jose CA; Intel Haifa, Intel Kiriat Gat; Sierra Microwave Technology, Austin Texas and Elta systems, Israel in senior R&D and Engineering management positions.

The seminar is free of charge to ACRC members, Intel, Marvell, Mellanox, Samsung, Zoran.

Others will be charged 1000 Shekels+VAT for participating in the seminar.

The seminar is open free of charge for EE students (undergraduate and graduate).