Webinar

The Advanced Circuit Research Center (ACRC) is inviting you to a free online seminar  “Agile Hardware Design with a Generator-Based Methodology” given by Prof. Elad Alon, University of California, Berkeley.

Despite the many applications that could substantially benefit from the energy-performance achievable with an SoC implemented in an advanced process technology, the high costs of designing and verifying such an SoC using current methodologies limits their adoption to end markets greater than ~$1B in size. Not only has this prevented substantial hardware innovation in emerging markets, but even in markets large enough to bear the high initial design cost, designers are being put under constant pressure to improve their productivity given increasingly tight time-to-market constraints and product cycles. In this talk Prof. Alon will describe a collaborative effort to develop an “agile” approach that aims to substantially reduce the design and verification costs of such advanced SoCs as well as their constituent sub-components. Building on principles originally developed for agile software design, the key missing piece for hardware is that rather than focusing on developing instances, designers should focus on developing generators that facilitate re-use and enable agile validation as well as verification. As he will describe in this talk, to support this shift in approach, a number of new technologies have been and continue to be developed in order to enable generation of digital and analog hardware as well as the means to verify the hardware that is produced. After briefly describing a subset of these technologies and highlighting some of their key features, he will then briefly describe various SoC generators and associated results from multiple SoC demonstrators taped-out and validated in a modern FinFET process technology.

Elad Alon is a Professor of Electrical Engineering and Computer Sciences at the University of California at Berkeley, a co-director of the Berkeley Wireless Research Center (BWRC), and an IEEE Fellow. He is also a Co-Founder and Chief Scientist at Blue Cheetah Analog Design, which is commercializing generator technologies to enable analog/mixed-signal solutions at lower barrier to entry.  He has held advisory, consulting, or visiting positions at a number of leading semiconductor companies, and along with his colleagues and students, been recognized with a number of awards at conference such as ISSCC, VLSI, and CICC.

Please sign up and join us on Tuesday , June 2 at 18:00 IDT.

Link to the Zoom session will be provided after the registration.

Important: The participation is free of charge, but registration is required  /webinar-alon-reg/

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