Supervisor: Prof. Zeljko Ignjatovic
Place: Technion, EE building, Auditorium 1003 (10th floor)
Date: 15.2.11
Abstract:
Analog and Mixed-signal Integrated Circuit Design
Can we describe analog and mixed-signal circuits as telecommunication channels and determine fundamental limits utilizing Information theory tools?
Professor Zeljko Ignjatovic, University of Rochester
15-17.2.11
Technion, EE building, Auditorium 1003 (10th floor)
Academic organizers: Prof. Eby Friedman and Prof. Avinoam Kolodny
Please, Register Online!
Course description and material: This course will discuss the circuitry, algorithms and architectures used in analog and mixed-signal mode CMOS integrated circuits, provide practical considerations and detailed design examples . In addition, information theoretical concepts closely related to the design of A/D converters will be discussed and their fundamental resolution-bandwidth limits will be presented. The discussion of the following topics is planned:
Agenda
February 15th
08:30 – 09:00 Registration
09:00 – 10:30 Introduction to Switched Capacitor (SC) Circuits and basic building blocks
10:30 – 10:45 Coffee Break
10:45 – 13:00 First order and biquad SC filters
13:00 – 14:00 Lunch Break
14:00 – 15:30 High-order SC filters and Non-ideal effects
15:30 – 15:45 Coffee Break
15:45 – 17:00 Other SC stages and Introduction to Sigma-delta A/D converters
February 16th
09:00 – 10:30 Noise shaping, MASH structurs and Non-ideal effects
10:30 – 10:45 Coffee Break
10:45 – 13:00 Higher order Sigma-delta Topologies
13:00 – 14:00 Lunch Break
14:00 – 15:30 Spread-spectrum Technique in Sigma-delta ADC
15:30 – 15:45 Coffee Break
15:45 – 17:00 Noise in SC circuits and Sigma-delta ADC; Turbo-code A/D converters
February 17th
09:00 – 10:30 CMOS Image Sensors
10:30 – 10:45 Coffee Break
10:45 – 13:00 Pixel designs in CMOS image sensors
13:00 – 14:00 Lunch Break
14:00 – 15:30 Image sensor readout methods with global feedback – improving readout speed and noise
15:30 – 15:45 Coffee Break
15:45 – 17:00 Fully digital image sensors utilizing pixel level Sigma-delta A/D converters
The seminar is free of charge to ACRC members, Intel, Marvell, Mellanox, Samsung, Zoran.
Others will be charged 1500 Shekels+VAT for participating in the seminar.
The course is open free of charge for EE students (undergraduate and graduate).