Modern deep neural networks (DNNs) require billions of multiply-accumulate operations per inference. Given that these computations require relatively low precision, it is feasible to consider analog arithmetic, which can be more efficient than digital in the low-SNR regime. However, the scale of DNNs favors circuits that leverage dense digital memory, leading to mixed-signal processing schemes for scalable solutions. This presentation will investigate the potential of mixed-signal approaches in the context of modern DNN processor architectures, which are typically limited by data movement and memory access. We will show that dense mixed-signal fabrics offer new degrees of freedom that can help alleviate these bottlenecks. In addition, we will derive asymptotic efficiency limits and highlight the challenges associated with data conversion interfaces (D/A and A/D) as well as programmability. Finally, these findings are extended to in-memory computing approaches (SRAM and RRAM-based) that are bound by similar constraints.
Boris Murmann is a Professor of Electrical Engineering at Stanford University. He joined Stanford in 2004 after completing his Ph.D. degree in electrical engineering at the University of California, Berkeley in 2003. From 1994 to 1997, he was with Neutron Microelectronics, Germany, where he developed low-power and smart-power ASICs in automotive CMOS technology. Since 2004, he has worked as a consultant with numerous Silicon Valley companies. Dr. Murmann’s research interests are in mixed-signal integrated circuit design, with special emphasis on sensor interfaces, data converters and custom circuits for embedded machine learning. In 2008, he was a co-recipient of the Best Student Paper Award at the VLSI Circuits Symposium and a recipient of the Best Invited Paper Award at the IEEE Custom Integrated Circuits Conference (CICC). He received the Agilent Early Career Professor Award in 2009 and the Friedrich Wilhelm Bessel Research Award in 2012. He has served as an Associate Editor of the IEEE Journal of Solid-State Circuits, an AdCom member and Distinguished Lecturer of the IEEE Solid-State Circuits Society, as well as the Data Converter Subcommittee Chair and the Technical Program Chair of the IEEE International Solid-State Circuits Conference (ISSCC). He is the founding faculty co-director of the Stanford SystemX Alliance and the faculty director of Stanford’s System Prototyping Facility (SPF). He is a Fellow of the IEEE.
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